C compiler aided design of application specific instruction set processors using the machine description language LISA

The utilization of application specific instruction-set processors (ASIPs) allows for realizing System-on-Chip (SoC) circuits that are flexible, fast, and energy efficient at the same time. One way to reduce the high ASIP design effort is to create all software tools and hardware models from a single processor description written in a architecture description language (ADL). In this thesis LISA (language for instruction-set architectures) was used in a case study: The impact of incorporating a C compiler in the architecture exploration phase with respect to the processor architecture, the design time and the system reusability was analyzed. Another goal of this thesis was the (semi)automatic retargeting of a compiler from a LISA processor description. The case study pointed out the important role of the instruction scheduler in the ASIP design process. Therefore much effort was spent in finding algorithms for fully automatically retargeting this compiler component.